53 lines
1.9 KiB
OpenEdge ABL
53 lines
1.9 KiB
OpenEdge ABL
IFND HARDWARE_ADKBITS_I
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HARDWARE_ADKBITS_I SET 1
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**
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** $VER: adkbits.i 39.1 (18.09.92)
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** Includes Release 39.108
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**
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** bit definitions for adkcon register
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**
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** (C) Copyright 1985-1992 Commodore-Amiga, Inc.
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** All Rights Reserved
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**
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ADKB_SETCLR EQU 15 ; standard set/clear bit
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ADKB_PRECOMP1 EQU 14 ; two bits of precompensation
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ADKB_PRECOMP0 EQU 13
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ADKB_MFMPREC EQU 12 ; use mfm style precompensation
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ADKB_UARTBRK EQU 11 ; force uart output to zero
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ADKB_WORDSYNC EQU 10 ; enable DSKSYNC register matching
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ADKB_MSBSYNC EQU 9 ; (Apple GCR Only) sync on MSB for reading
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ADKB_FAST EQU 8 ; 1 -> 2 us/bit (mfm), 2 -> 4 us/bit (gcr)
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ADKB_USE3PN EQU 7 ; use aud chan 3 to modulate period of ??
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ADKB_USE2P3 EQU 6 ; use aud chan 2 to modulate period of 3
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ADKB_USE1P2 EQU 5 ; use aud chan 1 to modulate period of 2
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ADKB_USE0P1 EQU 4 ; use aud chan 0 to modulate period of 1
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ADKB_USE3VN EQU 3 ; use aud chan 3 to modulate volume of ??
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ADKB_USE2V3 EQU 2 ; use aud chan 2 to modulate volume of 3
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ADKB_USE1V2 EQU 1 ; use aud chan 1 to modulate volume of 2
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ADKB_USE0V1 EQU 0 ; use aud chan 0 to modulate volume of 1
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ADKF_SETCLR EQU (1<<15)
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ADKF_PRECOMP1 EQU (1<<14)
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ADKF_PRECOMP0 EQU (1<<13)
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ADKF_MFMPREC EQU (1<<12)
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ADKF_UARTBRK EQU (1<<11)
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ADKF_WORDSYNC EQU (1<<10)
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ADKF_MSBSYNC EQU (1<<9)
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ADKF_FAST EQU (1<<8)
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ADKF_USE3PN EQU (1<<7)
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ADKF_USE2P3 EQU (1<<6)
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ADKF_USE1P2 EQU (1<<5)
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ADKF_USE0P1 EQU (1<<4)
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ADKF_USE3VN EQU (1<<3)
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ADKF_USE2V3 EQU (1<<2)
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ADKF_USE1V2 EQU (1<<1)
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ADKF_USE0V1 EQU (1<<0)
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ADKF_PRE000NS EQU 0 ; 000 ns of precomp
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ADKF_PRE140NS EQU (ADKF_PRECOMP0) ; 140 ns of precomp
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ADKF_PRE280NS EQU (ADKF_PRECOMP1) ; 280 ns of precomp
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ADKF_PRE560NS EQU (ADKF_PRECOMP0!ADKF_PRECOMP1) ; 560 ns of precomp
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ENDC ; HARDWARE_ADKBITS_I
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