Missing files and fix for optional values in Memory Indirect mode.

This commit is contained in:
2021-10-08 18:04:15 +02:00
parent 653f8dc9fc
commit 031d5ff4ab
17 changed files with 380 additions and 48 deletions
@@ -376,10 +376,13 @@ MemoryIndirectAddressingMode ::= ROUND_L SQUARE_L (BaseDisplacement SEPARATOR)?
]
}
MemoryIndirectPostIndexedAddressingMode ::= ROUND_L (SQUARE_L (BaseDisplacement SEPARATOR)? AddressRegister SQUARE_R SEPARATOR)? IndexRegister (SEPARATOR OuterDisplacement)? ROUND_R
private internalMemoryIndirectPostIndexedOption1 ::= (BaseDisplacement SEPARATOR)? AddressRegister
private internalMemoryIndirectPostIndexedOption2 ::= BaseDisplacement (SEPARATOR AddressRegister)?
MemoryIndirectPostIndexedAddressingMode ::= ROUND_L (SQUARE_L (internalMemoryIndirectPostIndexedOption1|internalMemoryIndirectPostIndexedOption2) SQUARE_R SEPARATOR)? IndexRegister (SEPARATOR OuterDisplacement)? ROUND_R
{
implements = [
"de.platon42.intellij.plugins.m68k.psi.M68kWithAddressRegisterIndirect"
"de.platon42.intellij.plugins.m68k.psi.M68kWithOptionalAddressRegisterIndirect"
"de.platon42.intellij.plugins.m68k.psi.M68kWithBaseDisplacement"
"de.platon42.intellij.plugins.m68k.psi.M68kWithIndexRegister"
"de.platon42.intellij.plugins.m68k.psi.M68kWithOuterDisplacement"
@@ -390,10 +393,10 @@ MemoryIndirectPostIndexedAddressingMode ::= ROUND_L (SQUARE_L (BaseDisplacement
]
}
MemoryIndirectPreIndexedAddressingMode ::= ROUND_L SQUARE_L (BaseDisplacement SEPARATOR)? AddressRegister SEPARATOR IndexRegister SQUARE_R (SEPARATOR OuterDisplacement)? ROUND_R
MemoryIndirectPreIndexedAddressingMode ::= ROUND_L SQUARE_L (BaseDisplacement SEPARATOR)? (AddressRegister SEPARATOR)? IndexRegister SQUARE_R (SEPARATOR OuterDisplacement)? ROUND_R
{
implements = [
"de.platon42.intellij.plugins.m68k.psi.M68kWithAddressRegisterIndirect"
"de.platon42.intellij.plugins.m68k.psi.M68kWithOptionalAddressRegisterIndirect"
"de.platon42.intellij.plugins.m68k.psi.M68kWithBaseDisplacement"
"de.platon42.intellij.plugins.m68k.psi.M68kWithIndexRegister"
"de.platon42.intellij.plugins.m68k.psi.M68kWithOuterDisplacement"
@@ -48,12 +48,6 @@ object M68kAddressModeUtil {
fun getReadWriteModifyRegisters(addressingMode: M68kAddressingMode?, rwm: Int): List<Pair<Register, Int>> {
if (addressingMode == null) return emptyList()
return when (addressingMode) {
is M68kImmediateData,
is M68kSpecialRegisterDirectAddressingMode,
is M68kProgramCounterIndirectWithDisplacementNewAddressingMode,
is M68kProgramCounterIndirectWithDisplacementOldAddressingMode,
is M68kAbsoluteAddressAddressingMode -> emptyList()
is M68kAddressRegisterIndirectPostIncAddressingMode -> listOf(Register.getRegFromName(addressingMode.addressRegister.text) to (RWM_READ_L or RWM_MODIFY_L))
is M68kAddressRegisterIndirectPreDecAddressingMode -> listOf(Register.getRegFromName(addressingMode.addressRegister.text) to (RWM_READ_L or RWM_MODIFY_L))
is M68kWithAddressRegisterIndirect -> listOf(Register.getRegFromName(addressingMode.addressRegister.text) to RWM_READ_L)
@@ -61,7 +55,7 @@ object M68kAddressModeUtil {
is M68kDataRegisterDirectAddressingMode -> listOf(Register.getRegFromName(addressingMode.dataRegister.text) to rwm)
is M68kAddressRegisterDirectAddressingMode -> listOf(Register.getRegFromName(addressingMode.addressRegister.text) to rwm)
is M68kRegisterListAddressingMode -> addressingMode.registers.map { it to rwm }
else -> throw IllegalArgumentException("Unknown addressing mode $addressingMode")
else -> emptyList()
}.plus(
when (addressingMode) {
is M68kWithIndexRegister -> listOf(Register.getRegFromName(addressingMode.indexRegister.register.text) to if (addressingMode.indexRegister.isLongWidth) RWM_READ_L else RWM_READ_W)