chrisly42/mc68000-asm-plugin
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Bugfix: Interpretation of register lists was wrong in BNF.

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Massively extended M68kIsa with description on register modifications (not yet used in production code).
Changed BNF for additional AddressingMode interfaces.
This commit is contained in:
chrisly42
2021-08-01 10:08:01 +02:00
parent ce3cdbbed6
commit 09a4e62c7c
37 changed files with 680 additions and 184 deletions
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src/test/java/de/platon42/intellij/plugins/m68k/parser/AddressingModesTest.kt
+19 -4
View File
@@ -1,8 +1,12 @@
package de.platon42.intellij.plugins.m68k.parser
import com.intellij.psi.util.PsiTreeUtil
import de.platon42.intellij.jupiter.MyTestCase
import de.platon42.intellij.jupiter.ParsingTestExtension
import de.platon42.intellij.jupiter.TestDataSubPath
import de.platon42.intellij.plugins.m68k.asm.Register
import de.platon42.intellij.plugins.m68k.psi.M68kRegisterListAddressingMode
import org.assertj.core.api.Assertions.assertThat
import org.junit.jupiter.api.Test
@TestDataSubPath("addressingmodes")
@@ -85,7 +89,13 @@ internal class AddressingModesTest : AbstractParsingTest() {
@Test
internal fun movem_register_list(@MyTestCase testCase: ParsingTestExtension.IParsingTestCase) {
testGoodSyntax(testCase, " movem.l d0-d2/d4/a0-a2/a4,-(sp)\n")
testGoodSyntax(testCase, " movem.l d0-d2/d4/a0/a2-a3/a5,-(sp)\n")
val element = testCase.file.findElementAt(9)
val regList = PsiTreeUtil.getParentOfType(element, M68kRegisterListAddressingMode::class.java)!!
assertThat(regList.registers).containsExactlyInAnyOrder(
Register.D0, Register.D1, Register.D2, Register.D4,
Register.A0, Register.A2, Register.A3, Register.A5,
)
}
@Test
@@ -95,12 +105,17 @@ internal class AddressingModesTest : AbstractParsingTest() {
@Test
internal fun special_register_move(@MyTestCase testCase: ParsingTestExtension.IParsingTestCase) {
testGoodSyntax(testCase, " move.l usp,a0\n"
+ " move.l a5,usp\n")
testGoodSyntax(
testCase, " move.l usp,a0\n"
+ " move.l a5,usp\n"
)
}
@Test
internal fun complex_math_expression_in_displacement(@MyTestCase testCase: ParsingTestExtension.IParsingTestCase) {
testGoodSyntax(testCase, " move.l -(~(!!(+(1//~WIDTH^@123+3*4/2+(NARF%10|32!21))<<2)>>1)&$1f)(a0),(-(~(!!(+(1//~WIDTH^@123+3*4/2+(NARF%10|32!21))<<2)>>1)&\$1f),a0,d0.l)\n")
testGoodSyntax(
testCase,
" move.l -(~(!!(+(1//~WIDTH^@123+3*4/2+(NARF%10|32!21))<<2)>>1)&$1f)(a0),(-(~(!!(+(1//~WIDTH^@123+3*4/2+(NARF%10|32!21))<<2)>>1)&\$1f),a0,d0.l)\n"
)
}
}
src/test/resources/parser/addressingmodes/movem_register_list.txt
+14 -9
View File
@@ -8,23 +8,28 @@ Assembly File: a.asm
PsiElement(M68kTokenType.OPSIZE_L)('.l')
PsiWhiteSpace(' ')
M68kRegisterListAddressingModeImpl(REGISTER_LIST_ADDRESSING_MODE)
M68kDataRegisterImpl(DATA_REGISTER)
PsiElement(M68kTokenType.DREG)('d0')
PsiElement(M68kTokenType.OP_MINUS)('-')
M68kDataRegisterImpl(DATA_REGISTER)
PsiElement(M68kTokenType.DREG)('d2')
M68kRegisterRangeImpl(REGISTER_RANGE)
M68kDataRegisterImpl(DATA_REGISTER)
PsiElement(M68kTokenType.DREG)('d0')
PsiElement(M68kTokenType.OP_MINUS)('-')
M68kDataRegisterImpl(DATA_REGISTER)
PsiElement(M68kTokenType.DREG)('d2')
PsiElement(M68kTokenType.OP_AR_DIV)('/')
M68kDataRegisterImpl(DATA_REGISTER)
PsiElement(M68kTokenType.DREG)('d4')
PsiElement(M68kTokenType.OP_AR_DIV)('/')
M68kAddressRegisterImpl(ADDRESS_REGISTER)
PsiElement(M68kTokenType.AREG)('a0')
PsiElement(M68kTokenType.OP_MINUS)('-')
M68kAddressRegisterImpl(ADDRESS_REGISTER)
PsiElement(M68kTokenType.AREG)('a2')
PsiElement(M68kTokenType.OP_AR_DIV)('/')
M68kRegisterRangeImpl(REGISTER_RANGE)
M68kAddressRegisterImpl(ADDRESS_REGISTER)
PsiElement(M68kTokenType.AREG)('a2')
PsiElement(M68kTokenType.OP_MINUS)('-')
M68kAddressRegisterImpl(ADDRESS_REGISTER)
PsiElement(M68kTokenType.AREG)('a3')
PsiElement(M68kTokenType.OP_AR_DIV)('/')
M68kAddressRegisterImpl(ADDRESS_REGISTER)
PsiElement(M68kTokenType.AREG)('a4')
PsiElement(M68kTokenType.AREG)('a5')
PsiElement(M68kTokenType.SEPARATOR)(',')
M68kAddressRegisterIndirectPreDecAddressingModeImpl(ADDRESS_REGISTER_INDIRECT_PRE_DEC_ADDRESSING_MODE)
PsiElement(M68kTokenType.OP_MINUS)('-')