addq/subq for address register stated it would affect the condition codes, which it in fact doesn't.

This commit is contained in:
Chris Hodges 2022-10-09 17:20:41 +02:00
parent b785b716bb
commit 64b7042208
2 changed files with 2 additions and 1 deletions

View File

@ -64,6 +64,7 @@ patchPluginXml {
<h4>V0.10 (undefined)</h4>
<ul>
<li>New: Added semantic highlighting. Currently available for data and address registers and local labels.
<li>Bugfix: addq/subq for address register stated it would affect the condition codes, which it in fact doesn't.
</ul>
<p>Full changelog available at <a href="https://github.com/chrisly42/mc68000-asm-plugin#changelog">Github project site</a>.</p>
""")

View File

@ -294,7 +294,7 @@ object M68kIsa {
AllowedAdrMode(
setOf(AddressMode.IMMEDIATE_DATA), ALL_EXCEPT_AREG_IMMEDIATE_AND_PC_REL, modInfo = RWM_MODIFY_OP2_OPSIZE, affectedCc = cc("C****")
),
AllowedAdrMode(setOf(AddressMode.IMMEDIATE_DATA), AREG_ONLY, size = OP_SIZE_WL, modInfo = RWM_MODIFY_OP2_L, affectedCc = cc("C****"))
AllowedAdrMode(setOf(AddressMode.IMMEDIATE_DATA), AREG_ONLY, size = OP_SIZE_WL, modInfo = RWM_MODIFY_OP2_L)
)
private val ADDX_SUBX_MODES = listOf(