addq/subq for address register stated it would affect the condition codes, which it in fact doesn't.
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@ -64,6 +64,7 @@ patchPluginXml {
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<h4>V0.10 (undefined)</h4>
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<h4>V0.10 (undefined)</h4>
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<ul>
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<ul>
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<li>New: Added semantic highlighting. Currently available for data and address registers and local labels.
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<li>New: Added semantic highlighting. Currently available for data and address registers and local labels.
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<li>Bugfix: addq/subq for address register stated it would affect the condition codes, which it in fact doesn't.
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</ul>
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</ul>
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<p>Full changelog available at <a href="https://github.com/chrisly42/mc68000-asm-plugin#changelog">Github project site</a>.</p>
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<p>Full changelog available at <a href="https://github.com/chrisly42/mc68000-asm-plugin#changelog">Github project site</a>.</p>
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""")
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""")
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@ -294,7 +294,7 @@ object M68kIsa {
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AllowedAdrMode(
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AllowedAdrMode(
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setOf(AddressMode.IMMEDIATE_DATA), ALL_EXCEPT_AREG_IMMEDIATE_AND_PC_REL, modInfo = RWM_MODIFY_OP2_OPSIZE, affectedCc = cc("C****")
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setOf(AddressMode.IMMEDIATE_DATA), ALL_EXCEPT_AREG_IMMEDIATE_AND_PC_REL, modInfo = RWM_MODIFY_OP2_OPSIZE, affectedCc = cc("C****")
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),
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),
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AllowedAdrMode(setOf(AddressMode.IMMEDIATE_DATA), AREG_ONLY, size = OP_SIZE_WL, modInfo = RWM_MODIFY_OP2_L, affectedCc = cc("C****"))
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AllowedAdrMode(setOf(AddressMode.IMMEDIATE_DATA), AREG_ONLY, size = OP_SIZE_WL, modInfo = RWM_MODIFY_OP2_L)
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)
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)
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private val ADDX_SUBX_MODES = listOf(
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private val ADDX_SUBX_MODES = listOf(
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