diff --git a/README.md b/README.md
index d4c7707..3b9d92c 100644
--- a/README.md
+++ b/README.md
@@ -78,6 +78,7 @@ make it work with JUnit 5. Feel free to use the code (in package ```de.platon42.
- Bugfix: Minor fix for `andi/eori/ori to ccr` which were not byte sized in ISA.
- Bugfix: Added alternate condition code tests `HS (=CC)` and `LO (=CS)`.
- Performance: Optimized mnemonic lookup.
+- Enhancement: Reworked Instruction Documentation provider, now shows condition codes.
### V0.4 (03-Aug-21)
diff --git a/build.gradle b/build.gradle
index 889afa6..6ef5c2f 100644
--- a/build.gradle
+++ b/build.gradle
@@ -64,6 +64,7 @@ patchPluginXml {
Bugfix: Minor fix for `andi/eori/ori to ccr` which were not byte sized in ISA.
Bugfix: Added alternate condition code tests HS (=CC) and LO (=CS).
Performance: Optimized mnemonic lookup.
+ Enhancement: Reworked Instruction Documentation provider, now shows condition codes.
V0.4 (03-Aug-21)
diff --git a/src/main/java/de/platon42/intellij/plugins/m68k/asm/ConditionCode.kt b/src/main/java/de/platon42/intellij/plugins/m68k/asm/ConditionCode.kt
new file mode 100644
index 0000000..3696a87
--- /dev/null
+++ b/src/main/java/de/platon42/intellij/plugins/m68k/asm/ConditionCode.kt
@@ -0,0 +1,198 @@
+package de.platon42.intellij.plugins.m68k.asm
+
+const val CC_X_CLEAR = 0x10000
+const val CC_X_SET = 0x20000
+const val CC_X_UNDEF = 0x30000
+const val CC_X_RES = 0x40000
+const val CC_X_AND = 0x50000
+const val CC_X_OR = 0x60000
+const val CC_X_CARRY = 0x70000
+const val CC_X_TST = 0xf0000
+
+const val CC_N_CLEAR = 0x01000
+const val CC_N_SET = 0x02000
+const val CC_N_UNDEF = 0x03000
+const val CC_N_RES = 0x04000
+const val CC_N_AND = 0x05000
+const val CC_N_OR = 0x06000
+const val CC_N_TST = 0x0f000
+
+const val CC_Z_CLEAR = 0x00100
+const val CC_Z_SET = 0x00200
+const val CC_Z_UNDEF = 0x00300
+const val CC_Z_RES = 0x00400
+const val CC_Z_AND = 0x00500
+const val CC_Z_OR = 0x00600
+const val CC_Z_TST = 0x00f00
+
+const val CC_V_CLEAR = 0x00010
+const val CC_V_SET = 0x00020
+const val CC_V_UNDEF = 0x00030
+const val CC_V_RES = 0x00040
+const val CC_V_AND = 0x00050
+const val CC_V_OR = 0x00060
+const val CC_V_TST = 0x000f0
+
+const val CC_C_CLEAR = 0x00001
+const val CC_C_SET = 0x00002
+const val CC_C_UNDEF = 0x00003
+const val CC_C_RES = 0x00004
+const val CC_C_AND = 0x00005
+const val CC_C_OR = 0x00006
+const val CC_C_TST = 0x0000f
+
+private const val CC_NOT_AFFECTED_STR = "Not affected"
+private const val CC_ALWAYS_CLEAR_STR = "Always cleared"
+private const val CC_ALWAYS_SET_STR = "Always set"
+private const val CC_UNDEFINED_STR = "Undefined"
+private const val CC_RES_STR = "From result"
+private const val CC_AND_STR = "And'ed: Only cleared for zero bit"
+private const val CC_OR_STR = "Or'ed: Only set for one bit"
+
+fun getCcInfo(cc: Int): Map> {
+ val xnzvcMap = LinkedHashMap>(5)
+ xnzvcMap["X"] = when (cc and CC_X_TST) {
+ 0 -> "-" to CC_NOT_AFFECTED_STR
+ CC_X_SET -> "1" to CC_ALWAYS_SET_STR
+ CC_X_CLEAR -> "0" to CC_ALWAYS_CLEAR_STR
+ CC_X_UNDEF -> "U" to CC_UNDEFINED_STR
+ CC_X_AND -> "*" to CC_AND_STR
+ CC_X_OR -> "*" to CC_OR_STR
+ CC_X_CARRY -> "*" to "Set the same as the carry bit"
+ else -> "*" to "$CC_RES_STR (usually the bit shifted out)"
+ }
+ xnzvcMap["N"] = when (cc and CC_N_TST) {
+ 0 -> "-" to CC_NOT_AFFECTED_STR
+ CC_N_SET -> "1" to CC_ALWAYS_SET_STR
+ CC_N_CLEAR -> "0" to CC_ALWAYS_CLEAR_STR
+ CC_N_UNDEF -> "U" to CC_UNDEFINED_STR
+ CC_N_AND -> "*" to CC_AND_STR
+ CC_N_OR -> "*" to CC_OR_STR
+ else -> "*" to "$CC_RES_STR (usually if negative)"
+ }
+ xnzvcMap["Z"] = when (cc and CC_Z_TST) {
+ 0 -> "-" to CC_NOT_AFFECTED_STR
+ CC_Z_SET -> "1" to CC_ALWAYS_SET_STR
+ CC_Z_CLEAR -> "0" to CC_ALWAYS_CLEAR_STR
+ CC_Z_UNDEF -> "U" to CC_UNDEFINED_STR
+ CC_Z_AND -> "*" to CC_AND_STR
+ CC_Z_OR -> "*" to CC_OR_STR
+ else -> "*" to "$CC_RES_STR (usually if zero)"
+ }
+ xnzvcMap["V"] = when (cc and CC_V_TST) {
+ 0 -> "-" to CC_NOT_AFFECTED_STR
+ CC_V_SET -> "1" to CC_ALWAYS_SET_STR
+ CC_V_CLEAR -> "0" to CC_ALWAYS_CLEAR_STR
+ CC_V_UNDEF -> "U" to CC_UNDEFINED_STR
+ CC_V_AND -> "*" to CC_AND_STR
+ CC_V_OR -> "*" to CC_OR_STR
+ else -> "*" to "$CC_RES_STR (usually for overflows)"
+ }
+ xnzvcMap["C"] = when (cc and CC_V_TST) {
+ 0 -> "-" to CC_NOT_AFFECTED_STR
+ CC_V_SET -> "1" to CC_ALWAYS_SET_STR
+ CC_V_CLEAR -> "0" to CC_ALWAYS_CLEAR_STR
+ CC_V_UNDEF -> "U" to CC_UNDEFINED_STR
+ CC_V_AND -> "*" to CC_AND_STR
+ CC_V_OR -> "*" to CC_OR_STR
+ else -> "*" to "$CC_RES_STR (usually carry/borrow)"
+ }
+
+ return xnzvcMap
+}
+
+fun cc(xnzvc: String): Int {
+ var result = 0
+ result += when (xnzvc[0]) {
+ '-' -> 0
+ '0' -> CC_X_CLEAR
+ '1' -> CC_X_SET
+ 'U' -> CC_X_UNDEF
+ '*' -> CC_X_RES
+ 'A' -> CC_X_AND
+ 'O' -> CC_X_OR
+ 'C' -> CC_X_CARRY
+ '?' -> CC_X_TST
+ else -> throw IllegalArgumentException("Syntax Error")
+ }
+ result += when (xnzvc[1]) {
+ '-' -> 0
+ '0' -> CC_N_CLEAR
+ '1' -> CC_N_SET
+ 'U' -> CC_N_UNDEF
+ '*' -> CC_N_RES
+ 'A' -> CC_N_AND
+ 'O' -> CC_N_OR
+ '?' -> CC_N_TST
+ else -> throw IllegalArgumentException("Syntax Error")
+ }
+ result += when (xnzvc[2]) {
+ '-' -> 0
+ '0' -> CC_Z_CLEAR
+ '1' -> CC_Z_SET
+ 'U' -> CC_Z_UNDEF
+ '*' -> CC_Z_RES
+ 'A' -> CC_Z_AND
+ 'O' -> CC_Z_OR
+ '?' -> CC_Z_TST
+ else -> throw IllegalArgumentException("Syntax Error")
+ }
+ result += when (xnzvc[3]) {
+ '-' -> 0
+ '0' -> CC_V_CLEAR
+ '1' -> CC_V_SET
+ 'U' -> CC_V_UNDEF
+ '*' -> CC_V_RES
+ 'A' -> CC_V_AND
+ 'O' -> CC_V_OR
+ '?' -> CC_V_TST
+ else -> throw IllegalArgumentException("Syntax Error")
+ }
+ result += when (xnzvc[4]) {
+ '-' -> 0
+ '0' -> CC_C_CLEAR
+ '1' -> CC_C_SET
+ 'U' -> CC_C_UNDEF
+ '*' -> CC_C_RES
+ 'A' -> CC_C_AND
+ 'O' -> CC_C_OR
+ '?' -> CC_C_TST
+ else -> throw IllegalArgumentException("Syntax Error")
+ }
+ return result
+}
+
+enum class ConditionCode(val cc: String, val testedCc: Int) {
+ TRUE("t", cc("-----")),
+ FALSE("f", cc("-----")),
+ HI("hi", cc("--?-?")),
+ LS("ls", cc("--?-?")),
+ CC("cc", cc("----?")),
+ HS("hs", cc("----?")), // same as CC
+ CS("cs", cc("----?")),
+ LO("lo", cc("----?")), // same as CS
+ NE("ne", cc("--?--")),
+ EQ("eq", cc("--?--")),
+ VC("vc", cc("---?-")),
+ VS("vs", cc("---?-")),
+ PL("pl", cc("-?---")),
+ MI("mi", cc("-?---")),
+ GE("ge", cc("-?-?-")),
+ LT("lt", cc("-?-?-")),
+ GT("gt", cc("-???-")),
+ LE("le", cc("-???-"));
+
+ companion object {
+ private val NAME_TO_CC_MAP = values().associateBy { it.cc }
+
+ fun getCcFromName(cc: String) = NAME_TO_CC_MAP[cc.lowercase()]!!
+
+ fun getCcFromMnemonic(mnemonic: String) =
+ // handle special case for dbra
+ if (mnemonic.equals("dbra", ignoreCase = true)) {
+ FALSE
+ } else {
+ NAME_TO_CC_MAP[mnemonic.substring(mnemonic.length - 2).lowercase()]!!
+ }
+ }
+}
diff --git a/src/main/java/de/platon42/intellij/plugins/m68k/asm/M68kIsa.kt b/src/main/java/de/platon42/intellij/plugins/m68k/asm/M68kIsa.kt
index 0497c69..9b7df89 100644
--- a/src/main/java/de/platon42/intellij/plugins/m68k/asm/M68kIsa.kt
+++ b/src/main/java/de/platon42/intellij/plugins/m68k/asm/M68kIsa.kt
@@ -113,108 +113,6 @@ const val RWM_SET_OP2_L = RWM_SET_L shl RWM_OP2_SHIFT
const val RWM_MODIFY_STACK = 0x1000000
-const val CC_X_CLEAR = 0x10000
-const val CC_X_SET = 0x20000
-const val CC_X_UNDEF = 0x30000
-const val CC_X_RES = 0x40000
-const val CC_X_AND = 0x50000
-const val CC_X_OR = 0x60000
-const val CC_X_CARRY = 0x70000
-const val CC_X_TST = 0xf0000
-
-const val CC_N_CLEAR = 0x01000
-const val CC_N_SET = 0x02000
-const val CC_N_UNDEF = 0x03000
-const val CC_N_RES = 0x04000
-const val CC_N_AND = 0x05000
-const val CC_N_OR = 0x06000
-const val CC_N_TST = 0x0f000
-
-const val CC_Z_CLEAR = 0x00100
-const val CC_Z_SET = 0x00200
-const val CC_Z_UNDEF = 0x00300
-const val CC_Z_RES = 0x00400
-const val CC_Z_AND = 0x00500
-const val CC_Z_OR = 0x00600
-const val CC_Z_TST = 0x00f00
-
-const val CC_V_CLEAR = 0x00010
-const val CC_V_SET = 0x00020
-const val CC_V_UNDEF = 0x00030
-const val CC_V_RES = 0x00040
-const val CC_V_AND = 0x00050
-const val CC_V_OR = 0x00060
-const val CC_V_TST = 0x000f0
-
-const val CC_C_CLEAR = 0x00001
-const val CC_C_SET = 0x00002
-const val CC_C_UNDEF = 0x00003
-const val CC_C_RES = 0x00004
-const val CC_C_AND = 0x00005
-const val CC_C_OR = 0x00006
-const val CC_C_TST = 0x0000f
-
-private fun cc(xnzvc: String): Int {
- var result = 0
- result += when (xnzvc[0]) {
- '-' -> 0
- '0' -> CC_X_CLEAR
- '1' -> CC_X_SET
- 'U' -> CC_X_UNDEF
- '*' -> CC_X_RES
- 'A' -> CC_X_AND
- 'O' -> CC_X_OR
- 'C' -> CC_X_CARRY
- '?' -> CC_X_TST
- else -> throw IllegalArgumentException("Syntax Error")
- }
- result += when (xnzvc[1]) {
- '-' -> 0
- '0' -> CC_N_CLEAR
- '1' -> CC_N_SET
- 'U' -> CC_N_UNDEF
- '*' -> CC_N_RES
- 'A' -> CC_N_AND
- 'O' -> CC_N_OR
- '?' -> CC_N_TST
- else -> throw IllegalArgumentException("Syntax Error")
- }
- result += when (xnzvc[2]) {
- '-' -> 0
- '0' -> CC_Z_CLEAR
- '1' -> CC_Z_SET
- 'U' -> CC_Z_UNDEF
- '*' -> CC_Z_RES
- 'A' -> CC_Z_AND
- 'O' -> CC_Z_OR
- '?' -> CC_Z_TST
- else -> throw IllegalArgumentException("Syntax Error")
- }
- result += when (xnzvc[3]) {
- '-' -> 0
- '0' -> CC_V_CLEAR
- '1' -> CC_V_SET
- 'U' -> CC_V_UNDEF
- '*' -> CC_V_RES
- 'A' -> CC_V_AND
- 'O' -> CC_V_OR
- '?' -> CC_V_TST
- else -> throw IllegalArgumentException("Syntax Error")
- }
- result += when (xnzvc[4]) {
- '-' -> 0
- '0' -> CC_C_CLEAR
- '1' -> CC_C_SET
- 'U' -> CC_C_UNDEF
- '*' -> CC_C_RES
- 'A' -> CC_C_AND
- 'O' -> CC_C_OR
- '?' -> CC_C_TST
- else -> throw IllegalArgumentException("Syntax Error")
- }
- return result
-}
-
data class AllowedAdrMode(
val op1: Set? = null,
val op2: Set? = null,
@@ -237,27 +135,6 @@ data class IsaData(
val modes: List = listOf(AllowedAdrMode()),
)
-enum class ConditionCode(val cc: String, val testedCc: Int) {
- TRUE("t", cc("-----")),
- FALSE("f", cc("-----")),
- HI("hi", cc("--?-?")),
- LS("ls", cc("--?-?")),
- CC("cc", cc("----?")),
- HS("hs", cc("----?")), // same as CC
- CS("cs", cc("----?")),
- LO("lo", cc("----?")), // same as CS
- NE("ne", cc("--?--")),
- EQ("eq", cc("--?--")),
- VC("vc", cc("---?-")),
- VS("vs", cc("---?-")),
- PL("pl", cc("-?---")),
- MI("mi", cc("-?---")),
- GE("ge", cc("-?-?-")),
- LT("lt", cc("-?-?-")),
- GT("gt", cc("-???-")),
- LE("le", cc("-???-"))
-}
-
object M68kIsa {
private val NO_OPS_UNSIZED = listOf(AllowedAdrMode(size = OP_UNSIZED))
diff --git a/src/main/java/de/platon42/intellij/plugins/m68k/documentation/M68kInstructionDocumentationProvider.kt b/src/main/java/de/platon42/intellij/plugins/m68k/documentation/M68kInstructionDocumentationProvider.kt
index 98749f0..dbeb0dc 100644
--- a/src/main/java/de/platon42/intellij/plugins/m68k/documentation/M68kInstructionDocumentationProvider.kt
+++ b/src/main/java/de/platon42/intellij/plugins/m68k/documentation/M68kInstructionDocumentationProvider.kt
@@ -10,6 +10,7 @@ import com.intellij.psi.PsiFile
import de.platon42.intellij.plugins.m68k.asm.AddressMode
import de.platon42.intellij.plugins.m68k.asm.IsaData
import de.platon42.intellij.plugins.m68k.asm.M68kIsa
+import de.platon42.intellij.plugins.m68k.asm.getCcInfo
import de.platon42.intellij.plugins.m68k.psi.M68kAsmInstruction
import de.platon42.intellij.plugins.m68k.psi.M68kAsmOp
import de.platon42.intellij.plugins.m68k.psi.M68kOperandSize
@@ -36,24 +37,67 @@ class M68kInstructionDocumentationProvider : AbstractDocumentationProvider() {
val defBuilder = createDefinition(isaData)
builder.append(defBuilder.wrapWith(DocumentationMarkup.DEFINITION_ELEMENT))
+ val hasSameCcsForEverything = isaData.modes.map { it.affectedCc }.distinct().count() == 1
+ var alreadyShownCcsOnce = false
val mnemonicInfoRows = HtmlBuilder()
- val headerCells = listOf(
- HtmlChunk.text("Mnemonic").wrapWith(DocumentationMarkup.SECTION_HEADER_CELL),
- HtmlChunk.text("Op1").wrapWith(DocumentationMarkup.SECTION_HEADER_CELL),
- HtmlChunk.text("Op2").wrapWith(DocumentationMarkup.SECTION_HEADER_CELL)
- )
- mnemonicInfoRows.append(HtmlChunk.tag("tr").children(headerCells))
- isaData.modes.forEach { allowedAdrMode ->
- val mnemonics = findOpSizeDescriptions(allowedAdrMode.size)
- .map { HtmlChunk.text(isaData.mnemonic + it).wrapWith(HtmlChunk.div()) }
- mnemonicInfoRows.append(
- HtmlChunk.tag("tr").children(
- DocumentationMarkup.SECTION_CONTENT_CELL.children(mnemonics),
- DocumentationMarkup.SECTION_CONTENT_CELL.child(collectAddressModes(allowedAdrMode.op1)),
- DocumentationMarkup.SECTION_CONTENT_CELL.child(collectAddressModes(allowedAdrMode.op2))
- )
- )
- }
+ mnemonicInfoRows.appendWithSeparators(HtmlChunk.tag("tr").child(HtmlChunk.hr().wrapWith(DocumentationMarkup.SECTION_CONTENT_CELL).attr("colspan", "3")),
+ isaData.modes.map { allowedAdrMode ->
+ val addressModeInfoRows = HtmlBuilder()
+ val headerCells = if (allowedAdrMode.op2 != null) {
+ listOf(
+ HtmlChunk.text("Mnemonic / CCs").wrapWith(DocumentationMarkup.SECTION_HEADER_CELL),
+ HtmlChunk.text("Operand 1").wrapWith(DocumentationMarkup.SECTION_HEADER_CELL),
+ HtmlChunk.text("Operand 2").wrapWith(DocumentationMarkup.SECTION_HEADER_CELL)
+ )
+ } else if (allowedAdrMode.op1 != null) {
+ listOf(
+ HtmlChunk.text("Mnemonic / CCs").wrapWith(DocumentationMarkup.SECTION_HEADER_CELL),
+ HtmlChunk.text("Operand").wrapWith(DocumentationMarkup.SECTION_HEADER_CELL)
+ )
+ } else {
+ listOf(HtmlChunk.text("Mnemonic / CCs").wrapWith(DocumentationMarkup.SECTION_HEADER_CELL))
+ }
+ addressModeInfoRows.append(HtmlChunk.tag("tr").children(headerCells))
+
+ val contentBuilder = HtmlBuilder()
+ val mnemonics = findOpSizeDescriptions(allowedAdrMode.size)
+ .map { HtmlChunk.text(isaData.mnemonic + it) }
+ contentBuilder.appendWithSeparators(HtmlChunk.br(), mnemonics)
+ contentBuilder.append(HtmlChunk.hr())
+ if (alreadyShownCcsOnce && hasSameCcsForEverything) {
+ contentBuilder.append(HtmlChunk.text("Condition Codes: Same as above"))
+ } else {
+ alreadyShownCcsOnce = true
+ contentBuilder.append(HtmlChunk.text("Condition Codes: "))
+ contentBuilder.append(HtmlChunk.br())
+ if (allowedAdrMode.affectedCc == 0) {
+ contentBuilder.append(HtmlChunk.text("Not affected."))
+ } else {
+ val ccMap = getCcInfo(allowedAdrMode.affectedCc)
+ val ccShortTableRows = HtmlBuilder()
+ ccShortTableRows.append(
+ HtmlChunk.tag("tr").children(ccMap.keys.map { HtmlChunk.text(it).wrapWith(DocumentationMarkup.SECTION_HEADER_CELL) })
+ )
+ ccShortTableRows.append(
+ HtmlChunk.tag("tr").children(ccMap.values.map {
+ HtmlChunk.text(it.first).wrapWith(DocumentationMarkup.SECTION_CONTENT_CELL)
+ })
+ )
+ contentBuilder.append(ccShortTableRows.wrapWith(DocumentationMarkup.SECTIONS_TABLE))
+ contentBuilder.appendWithSeparators(HtmlChunk.br(), ccMap.map {
+ HtmlChunk.text(it.key + " - " + it.value.second)
+ })
+ }
+ }
+ val cellsPerRow = ArrayList(3)
+ cellsPerRow.add(contentBuilder.toFragment())
+
+ if (allowedAdrMode.op1 != null) cellsPerRow.add(collectAddressModes(allowedAdrMode.op1))
+ if (allowedAdrMode.op1 != null) cellsPerRow.add(collectAddressModes(allowedAdrMode.op2))
+
+ addressModeInfoRows.append(HtmlChunk.tag("tr").children(cellsPerRow.map { it.wrapWith(DocumentationMarkup.SECTION_CONTENT_CELL) }))
+ addressModeInfoRows.toFragment()
+ })
val contentBuilder = HtmlBuilder()
contentBuilder.append(mnemonicInfoRows.wrapWith(DocumentationMarkup.SECTIONS_TABLE))
diff --git a/src/main/java/de/platon42/intellij/plugins/m68k/documentation/M68kRegisterFlowDocumentationProvider.kt b/src/main/java/de/platon42/intellij/plugins/m68k/documentation/M68kRegisterFlowDocumentationProvider.kt
index 5c77b41..ad51270 100644
--- a/src/main/java/de/platon42/intellij/plugins/m68k/documentation/M68kRegisterFlowDocumentationProvider.kt
+++ b/src/main/java/de/platon42/intellij/plugins/m68k/documentation/M68kRegisterFlowDocumentationProvider.kt
@@ -52,7 +52,7 @@ class M68kRegisterFlowDocumentationProvider : AbstractDocumentationProvider() {
val firstOp = asmInstruction.addressingModeList[0] == addressingMode
val cursorRwm = modifyRwmWithOpsize((adrMode.modInfo ushr if (firstOp) RWM_OP1_SHIFT else RWM_OP2_SHIFT) and RWM_OP_MASK, opSize)
- val backtrace: MutableList = ArrayList()
+ val backtrace = ArrayList()
val missingBits = if (cursorRwm and RWM_SET_L != 0) {
if (totalRwm and RWM_SET_L == RWM_SET_L) {
backtrace.add(
@@ -108,10 +108,10 @@ class M68kRegisterFlowDocumentationProvider : AbstractDocumentationProvider() {
startingStatement: M68kStatement,
linesLimit: Int,
direction: (statement: M68kStatement) -> M68kStatement?
- ): MutableList {
+ ): List {
var missingBits = rwmBits
var currStatement = startingStatement
- val statementLines: MutableList = ArrayList()
+ val statementLines = ArrayList()
val rn = register.regname
var addAbrevDots = false
var lines = 0
diff --git a/src/main/java/de/platon42/intellij/plugins/m68k/psi/M68kLookupUtil.kt b/src/main/java/de/platon42/intellij/plugins/m68k/psi/M68kLookupUtil.kt
index a3d8c3e..74c01f3 100644
--- a/src/main/java/de/platon42/intellij/plugins/m68k/psi/M68kLookupUtil.kt
+++ b/src/main/java/de/platon42/intellij/plugins/m68k/psi/M68kLookupUtil.kt
@@ -11,7 +11,7 @@ import de.platon42.intellij.plugins.m68k.stubs.M68kSymbolDefinitionStubIndex
object M68kLookupUtil {
fun findAllGlobalLabels(project: Project): List {
- val results: MutableList = ArrayList()
+ val results = ArrayList()
StubIndex.getInstance().processAllKeys(M68kGlobalLabelStubIndex.KEY, project)
{
results.addAll(StubIndex.getElements(M68kGlobalLabelStubIndex.KEY, it, project, GlobalSearchScope.allScope(project), M68kGlobalLabel::class.java))
@@ -21,7 +21,7 @@ object M68kLookupUtil {
}
fun findAllGlobalLabels(file: M68kFile): List {
- val results: MutableList = ArrayList()
+ val results = ArrayList()
StubIndex.getInstance().processAllKeys(
M68kGlobalLabelStubIndex.KEY,
{
@@ -44,7 +44,7 @@ object M68kLookupUtil {
fun findAllLocalLabels(globalLabel: M68kGlobalLabel): List {
val statement = PsiTreeUtil.getStubOrPsiParentOfType(globalLabel, M68kStatement::class.java)!!
- val results: MutableList = ArrayList()
+ val results = ArrayList()
var currentStatement = PsiTreeUtil.getNextSiblingOfType(statement, M68kStatement::class.java)
while (currentStatement != null) {
val child = currentStatement.firstChild
@@ -56,7 +56,7 @@ object M68kLookupUtil {
}
fun findAllSymbolDefinitions(project: Project): List {
- val results: MutableList = ArrayList()
+ val results = ArrayList()
StubIndex.getInstance().processAllKeys(M68kSymbolDefinitionStubIndex.KEY, project)
{
results.addAll(
@@ -74,7 +74,7 @@ object M68kLookupUtil {
}
fun findAllSymbolDefinitions(file: M68kFile): List {
- val results: MutableList = ArrayList()
+ val results = ArrayList()
StubIndex.getInstance().processAllKeys(
M68kSymbolDefinitionStubIndex.KEY,
{
@@ -97,7 +97,7 @@ object M68kLookupUtil {
fun findAllMacroDefinitions(project: Project): List {
- val results: MutableList = ArrayList()
+ val results = ArrayList()
StubIndex.getInstance().processAllKeys(M68kMacroDefinitionStubIndex.KEY, project)
{
results.addAll(
@@ -115,7 +115,7 @@ object M68kLookupUtil {
}
fun findAllMacroDefinitions(file: M68kFile): List {
- val results: MutableList = ArrayList()
+ val results = ArrayList()
StubIndex.getInstance().processAllKeys(
M68kMacroDefinitionStubIndex.KEY,
{
@@ -135,6 +135,4 @@ object M68kLookupUtil {
}
fun findAllMacroDefinitionNames(project: Project): Collection = StubIndex.getInstance().getAllKeys(M68kMacroDefinitionStubIndex.KEY, project)
-
-
}
\ No newline at end of file
diff --git a/src/main/java/de/platon42/intellij/plugins/m68k/psi/M68kPsiImplUtil.kt b/src/main/java/de/platon42/intellij/plugins/m68k/psi/M68kPsiImplUtil.kt
index 2325a89..ba3ce20 100644
--- a/src/main/java/de/platon42/intellij/plugins/m68k/psi/M68kPsiImplUtil.kt
+++ b/src/main/java/de/platon42/intellij/plugins/m68k/psi/M68kPsiImplUtil.kt
@@ -117,7 +117,7 @@ object M68kPsiImplUtil {
// RegisterListAddressingMode
@JvmStatic
fun getRegisters(element: M68kRegisterListAddressingMode): Set {
- val registers: MutableSet = HashSet()
+ val registers = HashSet()
element.registerList.forEach { registers.add(Register.getRegFromName(it.text)) }
element.registerRangeList.forEach {
var startReg = Register.getRegFromName(it.startRegister.text)
diff --git a/src/main/java/de/platon42/intellij/plugins/m68k/refs/M68kChooseByNameContributor.kt b/src/main/java/de/platon42/intellij/plugins/m68k/refs/M68kChooseByNameContributor.kt
index 2a0a5b2..c0cb99a 100644
--- a/src/main/java/de/platon42/intellij/plugins/m68k/refs/M68kChooseByNameContributor.kt
+++ b/src/main/java/de/platon42/intellij/plugins/m68k/refs/M68kChooseByNameContributor.kt
@@ -19,7 +19,7 @@ class M68kChooseByNameContributor : ChooseByNameContributorEx {
// }
// override fun getItemsByName(name: String, pattern: String, project: Project, includeNonProjectItems: Boolean): Array {
-// val result: MutableList = ArrayList()
+// val result = ArrayList()
// processElementsWithName(name, result::add, FindSymbolParameters.wrap(pattern, project, includeNonProjectItems))
// return result.toTypedArray()
// }
diff --git a/src/main/java/de/platon42/intellij/plugins/m68k/refs/M68kGlobalLabelSymbolReference.kt b/src/main/java/de/platon42/intellij/plugins/m68k/refs/M68kGlobalLabelSymbolReference.kt
index 40dbf95..6d7f78e 100644
--- a/src/main/java/de/platon42/intellij/plugins/m68k/refs/M68kGlobalLabelSymbolReference.kt
+++ b/src/main/java/de/platon42/intellij/plugins/m68k/refs/M68kGlobalLabelSymbolReference.kt
@@ -28,7 +28,7 @@ class M68kGlobalLabelSymbolReference(element: M68kSymbolReference) :
val refName = ref.element.symbolName
val project = ref.element.project
- val targets: MutableList = SmartList()
+ val targets = SmartList()
StubIndex.getInstance()
.processElements(M68kGlobalLabelStubIndex.KEY, refName, project, GlobalSearchScope.allScope(project), M68kGlobalLabel::class.java)
{
diff --git a/src/main/java/de/platon42/intellij/plugins/m68k/refs/M68kLocalLabelReference.kt b/src/main/java/de/platon42/intellij/plugins/m68k/refs/M68kLocalLabelReference.kt
index 5e8b965..0e0dee6 100644
--- a/src/main/java/de/platon42/intellij/plugins/m68k/refs/M68kLocalLabelReference.kt
+++ b/src/main/java/de/platon42/intellij/plugins/m68k/refs/M68kLocalLabelReference.kt
@@ -21,7 +21,7 @@ class M68kLocalLabelReference(element: M68kSymbolReference) : PsiPolyVariantRefe
fun findLocalLabels(element: M68kSymbolReference, predicate: (M68kLocalLabel) -> Boolean): List {
val statement = PsiTreeUtil.getStubOrPsiParentOfType(element, M68kStatement::class.java)!!
- val results: MutableList = SmartList()
+ val results = SmartList()
// go backward
var currentStatement = PsiTreeUtil.getPrevSiblingOfType(statement, M68kStatement::class.java)
while (currentStatement != null) {
diff --git a/src/main/java/de/platon42/intellij/plugins/m68k/refs/M68kMacroReference.kt b/src/main/java/de/platon42/intellij/plugins/m68k/refs/M68kMacroReference.kt
index a5ec377..f358208 100644
--- a/src/main/java/de/platon42/intellij/plugins/m68k/refs/M68kMacroReference.kt
+++ b/src/main/java/de/platon42/intellij/plugins/m68k/refs/M68kMacroReference.kt
@@ -25,7 +25,7 @@ class M68kMacroReference(element: M68kMacroCall) :
val macroName = ref.element.macroName
val project = ref.element.project
- val targets: MutableList = SmartList()
+ val targets = SmartList()
StubIndex.getInstance()
.processElements(M68kMacroDefinitionStubIndex.KEY, macroName, project, GlobalSearchScope.allScope(project), M68kMacroDefinition::class.java)
{
diff --git a/src/test/java/de/platon42/intellij/plugins/m68k/documentation/M68kInstructionDocumentationProviderTest.kt b/src/test/java/de/platon42/intellij/plugins/m68k/documentation/M68kInstructionDocumentationProviderTest.kt
index 4e210f9..916fb8f 100644
--- a/src/test/java/de/platon42/intellij/plugins/m68k/documentation/M68kInstructionDocumentationProviderTest.kt
+++ b/src/test/java/de/platon42/intellij/plugins/m68k/documentation/M68kInstructionDocumentationProviderTest.kt
@@ -19,7 +19,47 @@ internal class M68kInstructionDocumentationProviderTest : AbstractDocumentationP
)
assertThat(generateDocumentation(myFixture)).isEqualToIgnoringWhitespace(
"""
-Mnemonic | Op1 | Op2 |
moveq.l | #<xxx> | Dn |
+
+
+
+
+ Mnemonic / CCs |
+ Operand 1 |
+ Operand 2 |
+
+
+ moveq.l
+
+ Condition Codes:
+
+
+ X |
+ N |
+ Z |
+ V |
+ C |
+
+
+ - |
+ * |
+ * |
+ 0 |
+ 0 |
+
+
+ X - Not affected N - From result (usually if negative) Z - From result (usually if zero) V - Always cleared C - Always cleared
+ |
+
+ #<xxx>
+ |
+
+ Dn
+ |
+
+
+
"""
)
}
@@ -39,15 +79,13 @@ internal class M68kInstructionDocumentationProviderTest : AbstractDocumentationP
- Mnemonic |
- Op1 |
- Op2 |
+ Mnemonic / CCs |
+ Operand |
-
- bra.s
- bra.b
- bra.w
+ | bra.s bra.b bra.w
+
+ Condition Codes: Not affected.
|
(xxx).w|l
|