Moved Condition-Code stuff to separate file, added reverse mapping function.
Reworked Instruction Documentation provider, now shows condition codes. Cosmetics: Removed MutableList information where unnecessary
This commit is contained in:
parent
5881dcdaf8
commit
6f99c2ffcc
@ -78,6 +78,7 @@ make it work with JUnit 5. Feel free to use the code (in package ```de.platon42.
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- Bugfix: Minor fix for `andi/eori/ori to ccr` which were not byte sized in ISA.
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- Bugfix: Added alternate condition code tests `HS (=CC)` and `LO (=CS)`.
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- Performance: Optimized mnemonic lookup.
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- Enhancement: Reworked Instruction Documentation provider, now shows condition codes.
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### V0.4 (03-Aug-21)
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@ -64,6 +64,7 @@ patchPluginXml {
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<li>Bugfix: Minor fix for `andi/eori/ori to ccr` which were not byte sized in ISA.
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<li>Bugfix: Added alternate condition code tests HS (=CC) and LO (=CS).
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<li>Performance: Optimized mnemonic lookup.
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<li>Enhancement: Reworked Instruction Documentation provider, now shows condition codes.
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</ul>
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<h4>V0.4 (03-Aug-21)</h4>
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<ul>
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@ -0,0 +1,198 @@
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package de.platon42.intellij.plugins.m68k.asm
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const val CC_X_CLEAR = 0x10000
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const val CC_X_SET = 0x20000
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const val CC_X_UNDEF = 0x30000
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const val CC_X_RES = 0x40000
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const val CC_X_AND = 0x50000
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const val CC_X_OR = 0x60000
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const val CC_X_CARRY = 0x70000
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const val CC_X_TST = 0xf0000
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const val CC_N_CLEAR = 0x01000
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const val CC_N_SET = 0x02000
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const val CC_N_UNDEF = 0x03000
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const val CC_N_RES = 0x04000
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const val CC_N_AND = 0x05000
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const val CC_N_OR = 0x06000
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const val CC_N_TST = 0x0f000
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const val CC_Z_CLEAR = 0x00100
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const val CC_Z_SET = 0x00200
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const val CC_Z_UNDEF = 0x00300
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const val CC_Z_RES = 0x00400
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const val CC_Z_AND = 0x00500
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const val CC_Z_OR = 0x00600
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const val CC_Z_TST = 0x00f00
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const val CC_V_CLEAR = 0x00010
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const val CC_V_SET = 0x00020
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const val CC_V_UNDEF = 0x00030
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const val CC_V_RES = 0x00040
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const val CC_V_AND = 0x00050
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const val CC_V_OR = 0x00060
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const val CC_V_TST = 0x000f0
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const val CC_C_CLEAR = 0x00001
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const val CC_C_SET = 0x00002
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const val CC_C_UNDEF = 0x00003
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const val CC_C_RES = 0x00004
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const val CC_C_AND = 0x00005
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const val CC_C_OR = 0x00006
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const val CC_C_TST = 0x0000f
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private const val CC_NOT_AFFECTED_STR = "Not affected"
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private const val CC_ALWAYS_CLEAR_STR = "Always cleared"
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private const val CC_ALWAYS_SET_STR = "Always set"
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private const val CC_UNDEFINED_STR = "Undefined"
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private const val CC_RES_STR = "From result"
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private const val CC_AND_STR = "And'ed: Only cleared for zero bit"
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private const val CC_OR_STR = "Or'ed: Only set for one bit"
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fun getCcInfo(cc: Int): Map<String, Pair<String, String>> {
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val xnzvcMap = LinkedHashMap<String, Pair<String, String>>(5)
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xnzvcMap["X"] = when (cc and CC_X_TST) {
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0 -> "-" to CC_NOT_AFFECTED_STR
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CC_X_SET -> "1" to CC_ALWAYS_SET_STR
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CC_X_CLEAR -> "0" to CC_ALWAYS_CLEAR_STR
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CC_X_UNDEF -> "U" to CC_UNDEFINED_STR
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CC_X_AND -> "*" to CC_AND_STR
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CC_X_OR -> "*" to CC_OR_STR
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CC_X_CARRY -> "*" to "Set the same as the carry bit"
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else -> "*" to "$CC_RES_STR (usually the bit shifted out)"
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}
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xnzvcMap["N"] = when (cc and CC_N_TST) {
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0 -> "-" to CC_NOT_AFFECTED_STR
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CC_N_SET -> "1" to CC_ALWAYS_SET_STR
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CC_N_CLEAR -> "0" to CC_ALWAYS_CLEAR_STR
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CC_N_UNDEF -> "U" to CC_UNDEFINED_STR
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CC_N_AND -> "*" to CC_AND_STR
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CC_N_OR -> "*" to CC_OR_STR
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else -> "*" to "$CC_RES_STR (usually if negative)"
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}
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xnzvcMap["Z"] = when (cc and CC_Z_TST) {
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0 -> "-" to CC_NOT_AFFECTED_STR
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CC_Z_SET -> "1" to CC_ALWAYS_SET_STR
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CC_Z_CLEAR -> "0" to CC_ALWAYS_CLEAR_STR
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CC_Z_UNDEF -> "U" to CC_UNDEFINED_STR
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CC_Z_AND -> "*" to CC_AND_STR
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CC_Z_OR -> "*" to CC_OR_STR
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else -> "*" to "$CC_RES_STR (usually if zero)"
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}
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xnzvcMap["V"] = when (cc and CC_V_TST) {
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0 -> "-" to CC_NOT_AFFECTED_STR
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CC_V_SET -> "1" to CC_ALWAYS_SET_STR
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CC_V_CLEAR -> "0" to CC_ALWAYS_CLEAR_STR
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CC_V_UNDEF -> "U" to CC_UNDEFINED_STR
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CC_V_AND -> "*" to CC_AND_STR
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CC_V_OR -> "*" to CC_OR_STR
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else -> "*" to "$CC_RES_STR (usually for overflows)"
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}
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xnzvcMap["C"] = when (cc and CC_V_TST) {
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0 -> "-" to CC_NOT_AFFECTED_STR
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CC_V_SET -> "1" to CC_ALWAYS_SET_STR
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CC_V_CLEAR -> "0" to CC_ALWAYS_CLEAR_STR
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CC_V_UNDEF -> "U" to CC_UNDEFINED_STR
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CC_V_AND -> "*" to CC_AND_STR
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CC_V_OR -> "*" to CC_OR_STR
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else -> "*" to "$CC_RES_STR (usually carry/borrow)"
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}
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return xnzvcMap
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}
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fun cc(xnzvc: String): Int {
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var result = 0
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result += when (xnzvc[0]) {
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'-' -> 0
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'0' -> CC_X_CLEAR
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'1' -> CC_X_SET
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'U' -> CC_X_UNDEF
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'*' -> CC_X_RES
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'A' -> CC_X_AND
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'O' -> CC_X_OR
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'C' -> CC_X_CARRY
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'?' -> CC_X_TST
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else -> throw IllegalArgumentException("Syntax Error")
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}
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result += when (xnzvc[1]) {
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'-' -> 0
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'0' -> CC_N_CLEAR
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'1' -> CC_N_SET
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'U' -> CC_N_UNDEF
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'*' -> CC_N_RES
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'A' -> CC_N_AND
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'O' -> CC_N_OR
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'?' -> CC_N_TST
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else -> throw IllegalArgumentException("Syntax Error")
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}
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result += when (xnzvc[2]) {
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'-' -> 0
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'0' -> CC_Z_CLEAR
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'1' -> CC_Z_SET
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'U' -> CC_Z_UNDEF
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'*' -> CC_Z_RES
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'A' -> CC_Z_AND
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'O' -> CC_Z_OR
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'?' -> CC_Z_TST
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else -> throw IllegalArgumentException("Syntax Error")
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}
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result += when (xnzvc[3]) {
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'-' -> 0
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'0' -> CC_V_CLEAR
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'1' -> CC_V_SET
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'U' -> CC_V_UNDEF
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'*' -> CC_V_RES
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'A' -> CC_V_AND
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'O' -> CC_V_OR
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'?' -> CC_V_TST
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else -> throw IllegalArgumentException("Syntax Error")
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}
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result += when (xnzvc[4]) {
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'-' -> 0
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'0' -> CC_C_CLEAR
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'1' -> CC_C_SET
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'U' -> CC_C_UNDEF
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'*' -> CC_C_RES
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'A' -> CC_C_AND
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'O' -> CC_C_OR
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'?' -> CC_C_TST
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else -> throw IllegalArgumentException("Syntax Error")
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}
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return result
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}
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enum class ConditionCode(val cc: String, val testedCc: Int) {
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TRUE("t", cc("-----")),
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FALSE("f", cc("-----")),
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HI("hi", cc("--?-?")),
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LS("ls", cc("--?-?")),
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CC("cc", cc("----?")),
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HS("hs", cc("----?")), // same as CC
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CS("cs", cc("----?")),
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LO("lo", cc("----?")), // same as CS
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NE("ne", cc("--?--")),
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EQ("eq", cc("--?--")),
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VC("vc", cc("---?-")),
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VS("vs", cc("---?-")),
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PL("pl", cc("-?---")),
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MI("mi", cc("-?---")),
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GE("ge", cc("-?-?-")),
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LT("lt", cc("-?-?-")),
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GT("gt", cc("-???-")),
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LE("le", cc("-???-"));
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companion object {
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private val NAME_TO_CC_MAP = values().associateBy { it.cc }
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fun getCcFromName(cc: String) = NAME_TO_CC_MAP[cc.lowercase()]!!
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fun getCcFromMnemonic(mnemonic: String) =
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// handle special case for dbra
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if (mnemonic.equals("dbra", ignoreCase = true)) {
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FALSE
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} else {
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NAME_TO_CC_MAP[mnemonic.substring(mnemonic.length - 2).lowercase()]!!
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}
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}
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}
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@ -113,108 +113,6 @@ const val RWM_SET_OP2_L = RWM_SET_L shl RWM_OP2_SHIFT
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const val RWM_MODIFY_STACK = 0x1000000
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const val CC_X_CLEAR = 0x10000
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const val CC_X_SET = 0x20000
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const val CC_X_UNDEF = 0x30000
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const val CC_X_RES = 0x40000
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const val CC_X_AND = 0x50000
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const val CC_X_OR = 0x60000
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const val CC_X_CARRY = 0x70000
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const val CC_X_TST = 0xf0000
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const val CC_N_CLEAR = 0x01000
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const val CC_N_SET = 0x02000
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const val CC_N_UNDEF = 0x03000
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const val CC_N_RES = 0x04000
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const val CC_N_AND = 0x05000
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const val CC_N_OR = 0x06000
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const val CC_N_TST = 0x0f000
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const val CC_Z_CLEAR = 0x00100
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const val CC_Z_SET = 0x00200
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const val CC_Z_UNDEF = 0x00300
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const val CC_Z_RES = 0x00400
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const val CC_Z_AND = 0x00500
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const val CC_Z_OR = 0x00600
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const val CC_Z_TST = 0x00f00
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const val CC_V_CLEAR = 0x00010
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const val CC_V_SET = 0x00020
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const val CC_V_UNDEF = 0x00030
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const val CC_V_RES = 0x00040
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const val CC_V_AND = 0x00050
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const val CC_V_OR = 0x00060
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const val CC_V_TST = 0x000f0
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const val CC_C_CLEAR = 0x00001
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const val CC_C_SET = 0x00002
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const val CC_C_UNDEF = 0x00003
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const val CC_C_RES = 0x00004
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const val CC_C_AND = 0x00005
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const val CC_C_OR = 0x00006
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const val CC_C_TST = 0x0000f
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private fun cc(xnzvc: String): Int {
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var result = 0
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result += when (xnzvc[0]) {
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'-' -> 0
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'0' -> CC_X_CLEAR
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'1' -> CC_X_SET
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'U' -> CC_X_UNDEF
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'*' -> CC_X_RES
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'A' -> CC_X_AND
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'O' -> CC_X_OR
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'C' -> CC_X_CARRY
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'?' -> CC_X_TST
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else -> throw IllegalArgumentException("Syntax Error")
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}
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result += when (xnzvc[1]) {
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'-' -> 0
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'0' -> CC_N_CLEAR
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'1' -> CC_N_SET
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'U' -> CC_N_UNDEF
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'*' -> CC_N_RES
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'A' -> CC_N_AND
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'O' -> CC_N_OR
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'?' -> CC_N_TST
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else -> throw IllegalArgumentException("Syntax Error")
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}
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result += when (xnzvc[2]) {
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'-' -> 0
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'0' -> CC_Z_CLEAR
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'1' -> CC_Z_SET
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'U' -> CC_Z_UNDEF
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'*' -> CC_Z_RES
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'A' -> CC_Z_AND
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'O' -> CC_Z_OR
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'?' -> CC_Z_TST
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else -> throw IllegalArgumentException("Syntax Error")
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}
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result += when (xnzvc[3]) {
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'-' -> 0
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'0' -> CC_V_CLEAR
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'1' -> CC_V_SET
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'U' -> CC_V_UNDEF
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'*' -> CC_V_RES
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'A' -> CC_V_AND
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'O' -> CC_V_OR
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'?' -> CC_V_TST
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else -> throw IllegalArgumentException("Syntax Error")
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}
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result += when (xnzvc[4]) {
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'-' -> 0
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'0' -> CC_C_CLEAR
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'1' -> CC_C_SET
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'U' -> CC_C_UNDEF
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'*' -> CC_C_RES
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'A' -> CC_C_AND
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'O' -> CC_C_OR
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'?' -> CC_C_TST
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else -> throw IllegalArgumentException("Syntax Error")
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}
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return result
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}
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data class AllowedAdrMode(
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val op1: Set<AddressMode>? = null,
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val op2: Set<AddressMode>? = null,
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@ -237,27 +135,6 @@ data class IsaData(
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val modes: List<AllowedAdrMode> = listOf(AllowedAdrMode()),
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)
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enum class ConditionCode(val cc: String, val testedCc: Int) {
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TRUE("t", cc("-----")),
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FALSE("f", cc("-----")),
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HI("hi", cc("--?-?")),
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LS("ls", cc("--?-?")),
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CC("cc", cc("----?")),
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HS("hs", cc("----?")), // same as CC
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CS("cs", cc("----?")),
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LO("lo", cc("----?")), // same as CS
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NE("ne", cc("--?--")),
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EQ("eq", cc("--?--")),
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VC("vc", cc("---?-")),
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VS("vs", cc("---?-")),
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PL("pl", cc("-?---")),
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MI("mi", cc("-?---")),
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GE("ge", cc("-?-?-")),
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LT("lt", cc("-?-?-")),
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GT("gt", cc("-???-")),
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LE("le", cc("-???-"))
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}
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object M68kIsa {
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private val NO_OPS_UNSIZED = listOf(AllowedAdrMode(size = OP_UNSIZED))
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@ -10,6 +10,7 @@ import com.intellij.psi.PsiFile
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import de.platon42.intellij.plugins.m68k.asm.AddressMode
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import de.platon42.intellij.plugins.m68k.asm.IsaData
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import de.platon42.intellij.plugins.m68k.asm.M68kIsa
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import de.platon42.intellij.plugins.m68k.asm.getCcInfo
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import de.platon42.intellij.plugins.m68k.psi.M68kAsmInstruction
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import de.platon42.intellij.plugins.m68k.psi.M68kAsmOp
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import de.platon42.intellij.plugins.m68k.psi.M68kOperandSize
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@ -36,24 +37,67 @@ class M68kInstructionDocumentationProvider : AbstractDocumentationProvider() {
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val defBuilder = createDefinition(isaData)
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builder.append(defBuilder.wrapWith(DocumentationMarkup.DEFINITION_ELEMENT))
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val hasSameCcsForEverything = isaData.modes.map { it.affectedCc }.distinct().count() == 1
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var alreadyShownCcsOnce = false
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val mnemonicInfoRows = HtmlBuilder()
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val headerCells = listOf(
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HtmlChunk.text("Mnemonic").wrapWith(DocumentationMarkup.SECTION_HEADER_CELL),
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HtmlChunk.text("Op1").wrapWith(DocumentationMarkup.SECTION_HEADER_CELL),
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HtmlChunk.text("Op2").wrapWith(DocumentationMarkup.SECTION_HEADER_CELL)
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)
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mnemonicInfoRows.append(HtmlChunk.tag("tr").children(headerCells))
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isaData.modes.forEach { allowedAdrMode ->
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val mnemonics = findOpSizeDescriptions(allowedAdrMode.size)
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.map { HtmlChunk.text(isaData.mnemonic + it).wrapWith(HtmlChunk.div()) }
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mnemonicInfoRows.append(
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HtmlChunk.tag("tr").children(
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DocumentationMarkup.SECTION_CONTENT_CELL.children(mnemonics),
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DocumentationMarkup.SECTION_CONTENT_CELL.child(collectAddressModes(allowedAdrMode.op1)),
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DocumentationMarkup.SECTION_CONTENT_CELL.child(collectAddressModes(allowedAdrMode.op2))
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)
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)
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}
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mnemonicInfoRows.appendWithSeparators(HtmlChunk.tag("tr").child(HtmlChunk.hr().wrapWith(DocumentationMarkup.SECTION_CONTENT_CELL).attr("colspan", "3")),
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isaData.modes.map { allowedAdrMode ->
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val addressModeInfoRows = HtmlBuilder()
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val headerCells = if (allowedAdrMode.op2 != null) {
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listOf(
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HtmlChunk.text("Mnemonic / CCs").wrapWith(DocumentationMarkup.SECTION_HEADER_CELL),
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HtmlChunk.text("Operand 1").wrapWith(DocumentationMarkup.SECTION_HEADER_CELL),
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HtmlChunk.text("Operand 2").wrapWith(DocumentationMarkup.SECTION_HEADER_CELL)
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)
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} else if (allowedAdrMode.op1 != null) {
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listOf(
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HtmlChunk.text("Mnemonic / CCs").wrapWith(DocumentationMarkup.SECTION_HEADER_CELL),
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HtmlChunk.text("Operand").wrapWith(DocumentationMarkup.SECTION_HEADER_CELL)
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||||
)
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} else {
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listOf(HtmlChunk.text("Mnemonic / CCs").wrapWith(DocumentationMarkup.SECTION_HEADER_CELL))
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||||
}
|
||||
addressModeInfoRows.append(HtmlChunk.tag("tr").children(headerCells))
|
||||
|
||||
val contentBuilder = HtmlBuilder()
|
||||
val mnemonics = findOpSizeDescriptions(allowedAdrMode.size)
|
||||
.map { HtmlChunk.text(isaData.mnemonic + it) }
|
||||
contentBuilder.appendWithSeparators(HtmlChunk.br(), mnemonics)
|
||||
contentBuilder.append(HtmlChunk.hr())
|
||||
if (alreadyShownCcsOnce && hasSameCcsForEverything) {
|
||||
contentBuilder.append(HtmlChunk.text("Condition Codes: Same as above"))
|
||||
} else {
|
||||
alreadyShownCcsOnce = true
|
||||
contentBuilder.append(HtmlChunk.text("Condition Codes: "))
|
||||
contentBuilder.append(HtmlChunk.br())
|
||||
if (allowedAdrMode.affectedCc == 0) {
|
||||
contentBuilder.append(HtmlChunk.text("Not affected."))
|
||||
} else {
|
||||
val ccMap = getCcInfo(allowedAdrMode.affectedCc)
|
||||
val ccShortTableRows = HtmlBuilder()
|
||||
ccShortTableRows.append(
|
||||
HtmlChunk.tag("tr").children(ccMap.keys.map { HtmlChunk.text(it).wrapWith(DocumentationMarkup.SECTION_HEADER_CELL) })
|
||||
)
|
||||
ccShortTableRows.append(
|
||||
HtmlChunk.tag("tr").children(ccMap.values.map {
|
||||
HtmlChunk.text(it.first).wrapWith(DocumentationMarkup.SECTION_CONTENT_CELL)
|
||||
})
|
||||
)
|
||||
contentBuilder.append(ccShortTableRows.wrapWith(DocumentationMarkup.SECTIONS_TABLE))
|
||||
contentBuilder.appendWithSeparators(HtmlChunk.br(), ccMap.map {
|
||||
HtmlChunk.text(it.key + " - " + it.value.second)
|
||||
})
|
||||
}
|
||||
}
|
||||
val cellsPerRow = ArrayList<HtmlChunk>(3)
|
||||
cellsPerRow.add(contentBuilder.toFragment())
|
||||
|
||||
if (allowedAdrMode.op1 != null) cellsPerRow.add(collectAddressModes(allowedAdrMode.op1))
|
||||
if (allowedAdrMode.op1 != null) cellsPerRow.add(collectAddressModes(allowedAdrMode.op2))
|
||||
|
||||
addressModeInfoRows.append(HtmlChunk.tag("tr").children(cellsPerRow.map { it.wrapWith(DocumentationMarkup.SECTION_CONTENT_CELL) }))
|
||||
addressModeInfoRows.toFragment()
|
||||
})
|
||||
|
||||
val contentBuilder = HtmlBuilder()
|
||||
contentBuilder.append(mnemonicInfoRows.wrapWith(DocumentationMarkup.SECTIONS_TABLE))
|
||||
|
@ -52,7 +52,7 @@ class M68kRegisterFlowDocumentationProvider : AbstractDocumentationProvider() {
|
||||
|
||||
val firstOp = asmInstruction.addressingModeList[0] == addressingMode
|
||||
val cursorRwm = modifyRwmWithOpsize((adrMode.modInfo ushr if (firstOp) RWM_OP1_SHIFT else RWM_OP2_SHIFT) and RWM_OP_MASK, opSize)
|
||||
val backtrace: MutableList<HtmlChunk> = ArrayList()
|
||||
val backtrace = ArrayList<HtmlChunk>()
|
||||
val missingBits = if (cursorRwm and RWM_SET_L != 0) {
|
||||
if (totalRwm and RWM_SET_L == RWM_SET_L) {
|
||||
backtrace.add(
|
||||
@ -108,10 +108,10 @@ class M68kRegisterFlowDocumentationProvider : AbstractDocumentationProvider() {
|
||||
startingStatement: M68kStatement,
|
||||
linesLimit: Int,
|
||||
direction: (statement: M68kStatement) -> M68kStatement?
|
||||
): MutableList<HtmlChunk> {
|
||||
): List<HtmlChunk> {
|
||||
var missingBits = rwmBits
|
||||
var currStatement = startingStatement
|
||||
val statementLines: MutableList<HtmlChunk> = ArrayList()
|
||||
val statementLines = ArrayList<HtmlChunk>()
|
||||
val rn = register.regname
|
||||
var addAbrevDots = false
|
||||
var lines = 0
|
||||
|
@ -11,7 +11,7 @@ import de.platon42.intellij.plugins.m68k.stubs.M68kSymbolDefinitionStubIndex
|
||||
object M68kLookupUtil {
|
||||
|
||||
fun findAllGlobalLabels(project: Project): List<M68kGlobalLabel> {
|
||||
val results: MutableList<M68kGlobalLabel> = ArrayList()
|
||||
val results = ArrayList<M68kGlobalLabel>()
|
||||
StubIndex.getInstance().processAllKeys(M68kGlobalLabelStubIndex.KEY, project)
|
||||
{
|
||||
results.addAll(StubIndex.getElements(M68kGlobalLabelStubIndex.KEY, it, project, GlobalSearchScope.allScope(project), M68kGlobalLabel::class.java))
|
||||
@ -21,7 +21,7 @@ object M68kLookupUtil {
|
||||
}
|
||||
|
||||
fun findAllGlobalLabels(file: M68kFile): List<M68kGlobalLabel> {
|
||||
val results: MutableList<M68kGlobalLabel> = ArrayList()
|
||||
val results = ArrayList<M68kGlobalLabel>()
|
||||
StubIndex.getInstance().processAllKeys(
|
||||
M68kGlobalLabelStubIndex.KEY,
|
||||
{
|
||||
@ -44,7 +44,7 @@ object M68kLookupUtil {
|
||||
|
||||
fun findAllLocalLabels(globalLabel: M68kGlobalLabel): List<M68kLocalLabel> {
|
||||
val statement = PsiTreeUtil.getStubOrPsiParentOfType(globalLabel, M68kStatement::class.java)!!
|
||||
val results: MutableList<M68kLocalLabel> = ArrayList()
|
||||
val results = ArrayList<M68kLocalLabel>()
|
||||
var currentStatement = PsiTreeUtil.getNextSiblingOfType(statement, M68kStatement::class.java)
|
||||
while (currentStatement != null) {
|
||||
val child = currentStatement.firstChild
|
||||
@ -56,7 +56,7 @@ object M68kLookupUtil {
|
||||
}
|
||||
|
||||
fun findAllSymbolDefinitions(project: Project): List<M68kSymbolDefinition> {
|
||||
val results: MutableList<M68kSymbolDefinition> = ArrayList()
|
||||
val results = ArrayList<M68kSymbolDefinition>()
|
||||
StubIndex.getInstance().processAllKeys(M68kSymbolDefinitionStubIndex.KEY, project)
|
||||
{
|
||||
results.addAll(
|
||||
@ -74,7 +74,7 @@ object M68kLookupUtil {
|
||||
}
|
||||
|
||||
fun findAllSymbolDefinitions(file: M68kFile): List<M68kSymbolDefinition> {
|
||||
val results: MutableList<M68kSymbolDefinition> = ArrayList()
|
||||
val results = ArrayList<M68kSymbolDefinition>()
|
||||
StubIndex.getInstance().processAllKeys(
|
||||
M68kSymbolDefinitionStubIndex.KEY,
|
||||
{
|
||||
@ -97,7 +97,7 @@ object M68kLookupUtil {
|
||||
|
||||
|
||||
fun findAllMacroDefinitions(project: Project): List<M68kMacroDefinition> {
|
||||
val results: MutableList<M68kMacroDefinition> = ArrayList()
|
||||
val results = ArrayList<M68kMacroDefinition>()
|
||||
StubIndex.getInstance().processAllKeys(M68kMacroDefinitionStubIndex.KEY, project)
|
||||
{
|
||||
results.addAll(
|
||||
@ -115,7 +115,7 @@ object M68kLookupUtil {
|
||||
}
|
||||
|
||||
fun findAllMacroDefinitions(file: M68kFile): List<M68kMacroDefinition> {
|
||||
val results: MutableList<M68kMacroDefinition> = ArrayList()
|
||||
val results = ArrayList<M68kMacroDefinition>()
|
||||
StubIndex.getInstance().processAllKeys(
|
||||
M68kMacroDefinitionStubIndex.KEY,
|
||||
{
|
||||
@ -135,6 +135,4 @@ object M68kLookupUtil {
|
||||
}
|
||||
|
||||
fun findAllMacroDefinitionNames(project: Project): Collection<String> = StubIndex.getInstance().getAllKeys(M68kMacroDefinitionStubIndex.KEY, project)
|
||||
|
||||
|
||||
}
|
@ -117,7 +117,7 @@ object M68kPsiImplUtil {
|
||||
// RegisterListAddressingMode
|
||||
@JvmStatic
|
||||
fun getRegisters(element: M68kRegisterListAddressingMode): Set<Register> {
|
||||
val registers: MutableSet<Register> = HashSet()
|
||||
val registers = HashSet<Register>()
|
||||
element.registerList.forEach { registers.add(Register.getRegFromName(it.text)) }
|
||||
element.registerRangeList.forEach {
|
||||
var startReg = Register.getRegFromName(it.startRegister.text)
|
||||
|
@ -19,7 +19,7 @@ class M68kChooseByNameContributor : ChooseByNameContributorEx {
|
||||
// }
|
||||
|
||||
// override fun getItemsByName(name: String, pattern: String, project: Project, includeNonProjectItems: Boolean): Array<NavigationItem> {
|
||||
// val result: MutableList<NavigationItem> = ArrayList()
|
||||
// val result = ArrayList<NavigationItem>()
|
||||
// processElementsWithName(name, result::add, FindSymbolParameters.wrap(pattern, project, includeNonProjectItems))
|
||||
// return result.toTypedArray()
|
||||
// }
|
||||
|
@ -28,7 +28,7 @@ class M68kGlobalLabelSymbolReference(element: M68kSymbolReference) :
|
||||
val refName = ref.element.symbolName
|
||||
val project = ref.element.project
|
||||
|
||||
val targets: MutableList<M68kNamedElement> = SmartList()
|
||||
val targets = SmartList<M68kNamedElement>()
|
||||
StubIndex.getInstance()
|
||||
.processElements(M68kGlobalLabelStubIndex.KEY, refName, project, GlobalSearchScope.allScope(project), M68kGlobalLabel::class.java)
|
||||
{
|
||||
|
@ -21,7 +21,7 @@ class M68kLocalLabelReference(element: M68kSymbolReference) : PsiPolyVariantRefe
|
||||
|
||||
fun findLocalLabels(element: M68kSymbolReference, predicate: (M68kLocalLabel) -> Boolean): List<M68kLocalLabel> {
|
||||
val statement = PsiTreeUtil.getStubOrPsiParentOfType(element, M68kStatement::class.java)!!
|
||||
val results: MutableList<M68kLocalLabel> = SmartList()
|
||||
val results = SmartList<M68kLocalLabel>()
|
||||
// go backward
|
||||
var currentStatement = PsiTreeUtil.getPrevSiblingOfType(statement, M68kStatement::class.java)
|
||||
while (currentStatement != null) {
|
||||
|
@ -25,7 +25,7 @@ class M68kMacroReference(element: M68kMacroCall) :
|
||||
val macroName = ref.element.macroName
|
||||
val project = ref.element.project
|
||||
|
||||
val targets: MutableList<M68kMacroDefinition> = SmartList()
|
||||
val targets = SmartList<M68kMacroDefinition>()
|
||||
StubIndex.getInstance()
|
||||
.processElements(M68kMacroDefinitionStubIndex.KEY, macroName, project, GlobalSearchScope.allScope(project), M68kMacroDefinition::class.java)
|
||||
{
|
||||
|
@ -19,7 +19,47 @@ internal class M68kInstructionDocumentationProviderTest : AbstractDocumentationP
|
||||
)
|
||||
assertThat(generateDocumentation(myFixture)).isEqualToIgnoringWhitespace(
|
||||
"""
|
||||
<div class="definition"><pre><b>Move Quick</b></pre></div><div class="content"><table class="sections"><tr><td class="section" valign="top">Mnemonic</td><td class="section" valign="top">Op1</td><td class="section" valign="top">Op2</td></tr><tr><td valign="top"><div>moveq.l</div></td><td valign="top"><div>#<xxx></div></td><td valign="top"><div>Dn</div></td></tr></table></div>
|
||||
<div class="definition">
|
||||
<pre><b>Move Quick</b></pre>
|
||||
</div>
|
||||
<div class="content">
|
||||
<table class="sections">
|
||||
<tr>
|
||||
<td class="section" valign="top">Mnemonic / CCs</td>
|
||||
<td class="section" valign="top">Operand 1</td>
|
||||
<td class="section" valign="top">Operand 2</td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td valign="top">moveq.l
|
||||
<hr/>
|
||||
Condition Codes: <br/>
|
||||
<table class="sections">
|
||||
<tr>
|
||||
<td class="section" valign="top">X</td>
|
||||
<td class="section" valign="top">N</td>
|
||||
<td class="section" valign="top">Z</td>
|
||||
<td class="section" valign="top">V</td>
|
||||
<td class="section" valign="top">C</td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td valign="top">-</td>
|
||||
<td valign="top">*</td>
|
||||
<td valign="top">*</td>
|
||||
<td valign="top">0</td>
|
||||
<td valign="top">0</td>
|
||||
</tr>
|
||||
</table>
|
||||
X - Not affected<br/>N - From result (usually if negative)<br/>Z - From result (usually if zero)<br/>V - Always cleared<br/>C - Always cleared
|
||||
</td>
|
||||
<td valign="top">
|
||||
<div>#<xxx></div>
|
||||
</td>
|
||||
<td valign="top">
|
||||
<div>Dn</div>
|
||||
</td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
"""
|
||||
)
|
||||
}
|
||||
@ -39,15 +79,13 @@ internal class M68kInstructionDocumentationProviderTest : AbstractDocumentationP
|
||||
<div class="content">
|
||||
<table class="sections">
|
||||
<tr>
|
||||
<td class="section" valign="top">Mnemonic</td>
|
||||
<td class="section" valign="top">Op1</td>
|
||||
<td class="section" valign="top">Op2</td>
|
||||
<td class="section" valign="top">Mnemonic / CCs</td>
|
||||
<td class="section" valign="top">Operand</td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td valign="top">
|
||||
<div>bra.s</div>
|
||||
<div>bra.b</div>
|
||||
<div>bra.w</div>
|
||||
<td valign="top">bra.s<br/>bra.b<br/>bra.w
|
||||
<hr/>
|
||||
Condition Codes: <br/>Not affected.
|
||||
</td>
|
||||
<td valign="top">
|
||||
<div>(xxx).w|l</div>
|
||||
|
Loading…
Reference in New Issue
Block a user