chrisly42
cd0bcd22ff
Added folding support for functions and macro definitions.
2022-10-28 19:49:16 +02:00
chrisly42
f87bc7fea9
Added simple custom navigation bar.
2022-10-27 13:31:34 +02:00
chrisly42
64b7042208
addq/subq for address register stated it would affect the condition codes, which it in fact doesn't.
2022-10-09 17:20:41 +02:00
chrisly42
b785b716bb
Added semantic highlighting.
2022-08-16 21:41:46 +02:00
chrisly42
87cca67049
Updated dependencies. Tests work again. Cosmetics, fixed warnings.
2022-08-16 10:54:57 +02:00
chrisly42
5e2099f019
Fixed 'Unknown op size' exception when uppercase sizes were used.
2022-04-26 10:43:07 +02:00
chrisly42
ae92da7878
Maintenance. Updated all dependencies to the latest versions.
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Fixed condition code for asr/lsr/lsl, which is has a different behaviour for V flag than asl.
2022-04-07 10:30:12 +02:00
chrisly42
85b2596c64
Added some more settings for maximum parsed lines inside a macro and maximum displayed lines of code for documentation.
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RegisterFlow line counting fixed.
2021-10-15 13:05:47 +02:00
chrisly42
e0bd6981e3
Full support for MC68010 ISA ('movec', 'moves' and new special registers 'SFC' and 'DFC').
2021-10-11 11:32:13 +02:00
chrisly42
0ae17046d6
Added Language settings page with one option so far (-spaces option). Fixed lexer without -spaces option and directives.
2021-10-09 16:56:06 +02:00
chrisly42
031d5ff4ab
Missing files and fix for optional values in Memory Indirect mode.
2021-10-08 18:04:15 +02:00
chrisly42
653f8dc9fc
Extended ISA for 68020+ addressing modes (without adding 68020+ instructions).
2021-10-08 17:24:59 +02:00
chrisly42
a92630e5c7
Added Address Register Indirect with Base Displacement addressing mode.
2021-10-08 15:09:41 +02:00
chrisly42
3f1ef0e55a
Refactored BNF for base and outer displacement to avoid ambiguity for these expressions.
2021-10-08 11:22:53 +02:00
chrisly42
722d4437ec
Added missing support for size qualifiers for base and outer displacement.
2021-10-08 11:07:16 +02:00
chrisly42
f1110ac3c9
Added 68020 Memory Indirect and Program Counter Memory Indirect addressing modes.
2021-10-08 08:38:04 +02:00
chrisly42
7462c5b02d
Added support for SCALE in index addressing modes.
2021-10-08 08:37:29 +02:00
chrisly42
9b93ea05fc
Minor renaming & tweaks.
2021-10-07 17:11:06 +02:00
chrisly42
680b811e22
Macro definition / invocation documentation provider that even tries to expand macros.
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Moved some util classes around.
2021-10-03 20:26:33 +02:00
chrisly42
cbffc3d841
Label documentation now also works for local labels and includes end-of-line comment for label, too.
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Symbol definition documentation now also includes comments in the same way as the label documentation does.
Refactored some code.
2021-10-03 18:55:42 +02:00
chrisly42
435b30efc3
Bump to next version, updated docs due to Yann's first public release of his plugin.
2021-10-02 20:01:51 +02:00
chrisly42
62f7f13323
Bumped to IntelliJ/CLion 2021.2.2
2021-09-25 21:29:17 +02:00
chrisly42
c4051a0377
'END' detection was breaking parsing, causing havoc.
2021-09-25 17:20:45 +02:00
chrisly42
a03de6c394
Added documentation provider info for global labels. Shows directives and comments above.
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Fixed BNF for labels with preprocessor statements.
Bumped versions.
2021-09-25 15:19:05 +02:00
chrisly42
1bff1a12c2
Documentation for instruction with special register shows specific register expected.
2021-09-05 18:42:20 +02:00
chrisly42
665947827b
Updated build to latest versions.
2021-09-04 14:23:15 +02:00
chrisly42
3bb6165a58
Courtesy of Yann:
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Bugfix: Special registers for address mode matching only worked with lower case register names.
Bugfix: movem with pc-relative mode was missing for weird immediate mode.
Bugfix: btst with pc-relative and weird immediate mode was missing.
Enhancement: Assembler syntax with implicit immediate 1 for shifts and rotations no longer cause syntax errors.
2021-09-04 14:08:10 +02:00
chrisly42
89bd964fe7
Minor updates to documentation.
2021-08-09 15:27:12 +02:00
chrisly42
0cb90ff8d7
'END' directive stops parsing. Prepared next release.
2021-08-09 12:14:02 +02:00
chrisly42
431caf64fd
Added inspection for unresolved symbols, macros and labels.
2021-08-09 11:26:13 +02:00
chrisly42
a3f7ddb4f7
New: Added inspection suppression possibility and quickfix.
2021-08-09 10:08:41 +02:00
chrisly42
593719043e
New: Code completion for local label definitions, suggesting undefined labels already referenced.
2021-08-08 13:40:01 +02:00
chrisly42
e0cdfef42b
New: Files in 'include' directives can be referenced and renamed/refactored.
2021-08-06 20:03:47 +02:00
chrisly42
8d7977927f
Added M68kIncludeFileProvider, but dunno what it's actually for.
2021-08-06 19:12:54 +02:00
chrisly42
ddf78ec210
Slightly reworked lexer to for a few directives:
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'opt' and several other directives ('printt', 'fail' etc.) no longer causes a syntax error when unquoted.
'include', 'incdir' and 'incbin' and 'output' with '<pathname>' quotes no longer cause syntax error.
2021-08-06 10:06:48 +02:00
chrisly42
2c3daf28f7
TODO list. Prepared next release (for tomorrow).
2021-08-05 19:02:55 +02:00
chrisly42
1dcf288d27
Added inspection to warn about unexpected condition code unaffecting instructions before conditional instructions.
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Extended documentation.
Bugfix in M68kDeadWriteInspection.
2021-08-05 18:42:32 +02:00
chrisly42
2abb5af8b0
Macros with register name now abort Dead Write analysis. Fix for modifying statements extending the with of the written data.
2021-08-05 16:21:32 +02:00
chrisly42
6c9a726b86
Preprocessor statements now abort Dead Write analysis.
2021-08-05 15:46:16 +02:00
chrisly42
921449cbb8
Refactored stuff.
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Added control flow information to ISA.
In ISA exg is no longer treated as setting a definitive value.
Added inspection find dead writes to registers.
2021-08-04 17:39:54 +02:00
chrisly42
6f99c2ffcc
Moved Condition-Code stuff to separate file, added reverse mapping function.
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Reworked Instruction Documentation provider, now shows condition codes.
Cosmetics: Removed MutableList information where unnecessary
2021-08-04 12:24:16 +02:00
chrisly42
5881dcdaf8
Optimized mnemonic lookup.
2021-08-03 18:28:53 +02:00
chrisly42
71398f51d2
Reworked and extended ISA to hold condition code testing and affecting information (not used yet).
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Minor fix for `andi/eori/ori to ccr` which were not byte sized in ISA.
Added alternate condition code tests HS (=CC) and LO (=CS).
2021-08-03 13:45:44 +02:00
chrisly42
eb26793a20
movem ISA was wrong regarding movem.w <ea>,<registerlist> (sign extends registers).
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Changed Register Flow Documentation wording from 'reads' to 'uses' and from 'modifies' to 'changes'.
Updated screenshot. Added another test case for M68kRegisterFlowDocumentationProviderTest.
2021-08-03 10:57:53 +02:00
chrisly42
954f42bf63
Tweaking for M68kRegisterFlowDocumentationProvider regarding colors, formatting and abbreviated documentation on hover. Prepared next release.
2021-08-03 07:59:47 +02:00
chrisly42
94001c8b87
Added explicit IndexRegister-PSI-Element. Major rework to support new DocumentationProvider on registers.
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When asking for documentation on registers, a code flow analysis is done.
2021-08-02 20:54:30 +02:00
chrisly42
55403f89a6
Added a few tests for M68kSyntaxInspection.
2021-08-02 10:07:25 +02:00
chrisly42
7744b589d4
Added support for movem with register list crossing from data to address (e.g. d0-a6) as found in p61a source.
2021-08-02 09:43:42 +02:00
chrisly42
19e3b519db
Bugfix: Macro definitions with colons and without space supported (as found in P61a source).
2021-08-02 09:41:51 +02:00
chrisly42
587b284d25
Fix in movem ISA (supports pc relative if first parameter). Also, single registers must also work (often optimized by the assembler). Increased default max macro parsing length to 250 lines.
2021-08-02 09:41:51 +02:00
chrisly42